INVITED SPEAKERS

Dr. Koichiro Saga, Senior Manager, Sony Semiconductor Solutions Corporation

As semiconductor devices continue to shrink, metallic contamination on silicon surfaces become to have a detrimental impact on the device performance and yield.
Metal impurities dissolved in silicon can cause recombination centers, resulting in dark current in CMOS image sensors.
In this presentation, an overview of metallic contamination control, including the detection, removal, and gettering of metal impurities as well as the detection and identification of electric active metals in CMOS image sensor processing will be given.

Biography
Dr. Saga has been senior research manager position at Sony Corporation for 24 years with semiconductor surface contamination control and metrology technology development.
Saga received a Ph.D. in engineering field from Waseda University, Tokyo, Japan.Dr. Saga” is an organizer of “International Symposium on Semiconductor Cleaning Science and Technology” in “Electrochemical Society” meetings and, a representative of Japan in “Yield Enhancement” working group for International Roadmap for Device and Systems (IRDS).

Dr Emilie DELOFFRE, Senior member of technical staff STMicroelectronics, Crolles, France

The rapid advancement of microelectronics, historically driven by Moore’s Law, now faces physical and economic limits. To address this, the industry has adopted the “More than Moore” approach, focusing on heterogeneous integration within compact 3D architectures. Bonding techniques, especially direct and hybrid bonding, are crucial for assembling high-density multilayer systems. This article highlights the critical role of surface preparation in influencing bond strength, defectivity, and reliability. It also discusses advances in low-temperature bonding and challenges specific to die-to-wafer bonding.

Biography
Emilie Deloffre is in charge of advanced bonding process development at ST Crolles. She also develops bonding and debonding processes on other ST sites to create a strong network between STMicroelectronics and suppliers, CEA-Léti and academics laboratories.

Yoshihiro Ogawa, Chief Specialist, Research Strategy Planning Office, Frontier Technology R&D Institute, KIOXIA Corporation

Recent advancements in AI technology have increased the demand for high-performance, high-capacity semiconductors, thereby complicating manufacturing processes. This study focuses on the application of AI in defect classification, yield monitoring, and process optimization, particularly as applied to phosphoric acid etching in 3D NAND Flash fabrication. By employing computational fluid dynamics (CFD) and multi-objective Bayesian optimization, we propose optimal etching conditions and fixed parameters for batch-type wet etching bath without relying on wafer-based experimental verification.

Biography
Joined Toshiba’s semiconductor division (now KIOXIA) in 1995. Have focused on advanced memory process development, particularly WET processes. Since 2021, leading AIDX research at KIOXIA’s Frontier Technology R&D Institute. Member of the UCPSS Science Program Committee and the organizing committee of the Professional Group of Interfacial Nano Electrochemistry.

Ph.D Kuntack Lee, VP of Technology, Process Development Team, Semiconductor R&D Centre, Samsung Electronics, Ltd

Wet etching was widely used before 1970, then it was replaced by dry etching because of isotropic etching characteristics of wet etching from 5um era. However, wet etching has returned now with 3D devices as lateral, selective, partial uniform patterning methods. So highly selective and uniform removal processes, equipment and chemicals are required. These process challenges and their countermeasures will be discussed.

Biography
Kuntack Lee received his Ph.D. degree in Physical Chemistry from POSTECH, Korea. He started working at Samsung from 1996, became a VP of technology in 2014. He has researched various types of cleaning processes, including ScCO2 drying, selective removal chemistry, and dry cleaning, etc.